TEST TECHNOLOGY EDUCATIONAL PROGRAM 2019
(TTEP 2019)

The Tutorials & Education Group (TEG) of the IEEE Computer Society Test Technology Technical Council (TTTC) organizes in 2019 a comprehensive set of Test Technology Tutorials to be held in conjunction with TTTC sponsored technical meetings. The objective of this common call is to invite submissions for tutorial proposals in order to enable selecting the best fitted tutorials for each technical meeting, as part of the annual Test Technology Educational Program (TTEP).

The tutorials accepted by the Program Committee will be included in the Test Technology Educational Program, the intent of which is to serve the test and design professionals offering fundamental education and expert knowledge in state-of-the-art test technology topics.

The TTEP 2019 tutorials program addressed by this call includes the following technical meetings:

• Design Automation and Test in Europe (DATE’19)
• IEEE Latin American Test Symposium (LATS’19)
• IEEE VLSI Test Symposium (VTS’19)

Tutorials for International Test Conference (ITC’19), Asian Test Symposium (ATS’19), International Test Conference Asia (ITC-Asia’19) and International Test Conference India (ITC-India’19) will be solicited in a second call, to be published in December 2018.

TTEP accommodates a wide range of technical areas, from mature test topics of high interest to industrial test engineers to emerging test topics with emphasis on novelty. TTEP is soliciting new and updated tutorial proposals, as well as proposals for Test Clinics, which are particularly geared towards newcomers to the area of test, such as new test engineers and students pursuing graduate studies in test, with an objective of offering a broad yet comprehensive review of basic test topics in an accessible way to the lay audience. The topics of interest for year 2018 TTEP Tutorials include (but are not limited to):

• 3D chip testing
• Artificial Intelligence for test
• Automatic test equipment
• Board-level testing
• Built-in self-test (BIST)
• Defect oriented testing
• Design for testability
• Diagnosis and debug
• Embedded core testing
• Failure analysis techniques

• Functional safety
• High-speed interface testing
• Memory testing
• Mixed-Signal/Analog testing
• Nanometer technology testing
• On-line and In-field testing
• Performance/Delay testing
• Microprocessor testing
• Power issues in testing
• Reliability and Safety

• Secure DFT
• System-level testing
• Test data mining
• Test economics
• Test resource partitioning
• Test related standards
• Testing machine learning engines
• Verification and validation
• Wafer testing
• Yield optimization and test

All tutorial proposal submissions to TTEP 2019 are to be made electronically (in PDF format using the TTEP tutorial proposal template provided on both the TTEP main web site and the submission website) through the TTEP submissions website:

http://ttep.tttc-events.org/ttep/submission.html

Deadline for tutorial proposals: September 1, 2018.

TTEP central web site: http://ttep.tttc-events.org/ttep/

TTEP web site for submissions: http://ttep.tttc-events.org/ttep/submission.html

TTEP Chair:
Paolo Bernardi, Politecnico di Torino, I
E: paolo.bernardi@polito.it

TTEP Program Chair:
Ilia Polian, U Stuttgart, DE
E: ilia.polian@informatik.uni-stuttgart.de

TTEP Publicity Chair:
Andrea Floridia, Politecnico di Torino, I
E: andrea.floridia@polito.it

TTTC Liaison:
Yervant Zorian, Synopsys, US
E: yervant.zorian@synopsys.com

TTEP Program Committee:
Costas Argyrides, AMD, US
John Carulli, GlobalFoundries, US
Marc Hutner, Teradyne Inc., CA
Artur Jutman, Testonica, EE
Rohit Kapur, Cadence, US
Tal Kogan, Intel, IL
Prasad Mantri, Tessolve, IN
Srivaths Ravi, Texas Instruments, IN
Melanie Schillinsky, NXP, DE
Samvel Shoukourian, Synopsys, AM
Daniel Tille, Infineon Technologies, DE

TTEP 2019 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).

TTTC CHAIR
Chen-Huan CHIANG
Intel - USA
E-mail chen-huan.chiang@intel.com

PAST CHAIR
Michael NICOLAIDIS
TIMA laboratory - France
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
E-mail figueras@eel.upc.es

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
Politecnico di Torino - Italy
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR
Synopsys, Inc. - USA
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Adith SINGH
Auburn University – USA
E-mail adsingh@eng.auburn.edu

TTTC 2ND VICE CHAIR
Rohit KAPUR
Synopsys, Inc. – USA
E-mail rkapur@synopsys.com

FINANCE
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com